JOTEGO

Update on the Status of 1943 for MiSTer

Added 2019-05-07 21:01:28 +0000 UTC

About 10 days ago I released 1943 for MiST, but I know most of you want the MiSTer version. However, the port didn't go as expected, why?

MiST FPGA can work well with different circuits operating inside it at different clock speeds. The MiST SDRAM chip is also relatively close to the FPGA and that makes it more reliable. It was easy to get MiST to work at 106 MHz for SDRAM access while the core itself was running at just 12MHz.

For MiSTer the situation is an FPGA that doesn't like jumping from one clock to another and requires modifying the design. Plus, the SDRAM chip sits on an addon that connects through an unbalanced header, making it rather unpredictable. So MiSTer was asking for a lower SDRAM speed access and no more than one clock.

To fix this, I have been working all this time to have a single clock at 48MHz to run the SDRAM and the game core itself. It has been a bit of a nightmare. But I finally got it working today. I still have to polish it a bit but I see the light now!