Coin-Op Collection Update: Capcom ZN Announcement

It's been a very busy few weeks, I'm sure everyone would like to know what we've been working on and what the future holds.  This post will pretty much cover everything you'd like to know.  First off, I'd like to introduce Brandon Arnold, the newest member of Coin-Op Collection...

Brandon has a solid background and is an EE (Electrical Engineer) / SE (Software Engineer) who reached out to me in late November.  He was interested in tackling a few specific projects, mainly Capcom's ZN-1 / ZN-2 arcade hardware.  Why?  Because Brandon's a "Grandmaster".  A Tetris Grandmaster that is!  In addition to ZN-1 / ZN-2, he'll provide in-house reverse engineering on other projects!

Brandon started working on the Capcom ZN-1 / Capcom ZN-2 project in December, he's made an insane amount of progress in such a short period.  Darren and I recently met up with Brandon in mid-February to get a progress update on his work, hang out, and talk shop...  Now onto the fun stuff.

Capcom ZN-1 / Capcom ZN-2 Announcement:

Architectural Overview & Reverse Engineering Work:

Sony PlayStation (PSX) based platform, driven by an R3000A 32-Bit RISCH Processor, operating at 30 MIPS.  Being PSX based, the hardware uses additional RAM and VRAM and an upgraded CPU to further it's graphical capabilities.

The good news is, all key components have Verilog modules available for use or modification thanks to their respective authors.  There's still plenty not known about the true functions of the Capcom custom chips used, thankfully Brandon is an EE / SE who took on the task of having die shots produced, then moving to tracing and identifying all cells in the DL-3129 (C.P.S.2-B) custom.

Below is an overview for ZN-1 / ZN-2 (excludes Sony CXD8561Q / CXD8654Q GPU):

Schematics have been produced for ROM boards & mother board; they'll be released in the future.  Here's a general overview of how the z80 corresponds to the Q-Sound module.  As this is understood, I have no issues sharing this snippet of information from the Capcom 95681-2 schematic.

Below is the die shot Brandon has been studying, for the DL-3129 (C.P.S.2-B) custom. Many thanks to InfoSecDJ, who performed the decap and high resolution scan.  Colored sections identify all the distinct cells in the chip, there are 38 in total.  I'll show what the process looks like for routing a tracing one of the cells identified as well.

Here Brandon has routed the wires coming from cell00, thanks to support from Oni / TICS_Game and his immensely helpful Chip Tracing Tool. This is identified above in dark blue, again this is just one of the 38 cells being routed and traced.  Extensive reverse engineering work.

Here's an example of a cell identified by Brandon.  While some of the cell identification process could be completed by automation, Brandon has chosen to identify these cells by hand.  Below is a silicon layer that belongs to the RICOH RSC-15 cell library.

Here are some notes taken from Brandon's documentation that identify what's been traced and routed:

"Top and bottom rails are wired to Vdd and Vss, respectively.

Bulks p- for Vdd and p+ for Vss are connected along the full length of a horizontal CMOS array. For example, the one for nMOS is labeled “p+ for Vss” in Diagram 1 (“p- for Vdd” is similarly along the top, not labeled). Every cell includes one or more vias from the closest rail to arbitrary places along that bulk."

Additional Information:

We'll be targeting the following platforms first, Capcom ZN-1 / ZN-2 does support a few decent games and will be the basis for other PSX based platforms by Taito, Tecmo, Video System Company, and Namco.

After completion of the ZN-1 / ZN-2 documentation, Verilog implementation will begin and we'll move towards Taito G-Net documentation next.  I cannot emphasize this enough, the work done by Brandon will drive this core.

This process above follow's WydD / Loïc Petit reverse engineering work utilized by JOTEGO in his CPS2 implementation. Such solid CPS2 reverse engineering work was very valuable in JOTEGO's implementation of such an accurate CPS2 core.  This information was also submitted to MAME and used to update the CPS2 drivers.

Capcom ZN-1 Titles

• Battle Arena Toshinden 2

• Star Gladiator Episode I: Final Crusade

• Gallop Racer

• Street Fighter EX

• Street Fighter EX Plus

Capcom ZN-2 Titles

• Rival Schools: United By Fate

• Street Fighter EX2

• Star Gladiator 2: Nightmare of Bilstein

• Tetris: The Grand Master

• Tech Romancer

• Street Fighter EX2 Plus

• Strider 2

Namco Pre-86 & Namco 86 (Announcement) Status Update:

Namco "Pre-86" / Namco 86 Architectural Overview:

This hardware is driven by a Motorola MC6809E and various Namco custom components (see below), including a sub-CPU (CUS60, also identified as the Hitachi HD63701).  The good news is this, there are multiple resources available for Verilog modules.

What's the bad news?  Most of the source code provided from MiSTer-X, the author of Pac-Land is outdated.  Why?  He wrote it in 2014, which was quite a feat!  But there are drawbacks, it heavily relies on a framework created to drive a Xilinx FPGA board, has hardcoded ROMs that load from included hex from a non-identified set in MAME.  The core uses outdated CPU modules, there are several clocking issues, there was no loader, it has hardcoded dipswitches and inputs etc.

The key component that drives Namco "Pre-86" & 86 titles is the CUS60, also known as the Hitachi HD63701.  MiSTer-X's implementation of this CPU is very impressive.  Pramod dug down into the assemble and microcode written in Ruby to get a better understanding of its implementation.

Additional Information:

A lot of this core has been reworked by Pramod, ported from Xilinx to JTFrame, utilizing a stripped-down framework and the first FPGA platform targeted will be the Analogue Pocket.  Once we've finished development, I'll work on the MiSTerFPGA port of Pac-Land and the additional "Pre-86" titles.

This will be a multi-game core, derived from various hardware platforms with minimal changes.  MiSTer-X stated he was able to run some of the titles below, there is no indication of this based upon the provided source code, however the boards share commonality.

The additional customs for Namco 86 platform will be modules provided by Darren, after the initial standup of Pac-Land et al., we'll start focusing on Namco 86 and expand the Namco "Pre-86" implementation to include Rolling Thunder etc.

Namco Pre-86 Titles

• Dragon Buster

• Sky Kid

• Pac-Land

• Metro-Cross

• Baraduke / Alien Sector

Namco 86 Titles

• Sky Kid Deluxe

• Hopping Mappy

• The Return of Ishtar

• Genpei ToumaDen

• Rolling Thunder

• Wonder Momo

Current simulation output is above, these are due to the customs, line counter generation and all of the MCU handling done by the CUS60; which also generates the pixel clock.  Pramod is currently working thru them, below is a shot of how the boot sequence is with no issues.

We'll see another update covering additional projects early next week and possibly a new Jaleco Mega System 1 title...  Thanks again for your support!